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1. general description the tda8594 is a complementary quad bridge tied load (btl) audio power amplifier made in bcdmos technology. it contains four independent amplifiers in btl configuration. through the i 2 c-bus, diagnosis of temperature warning and clipping level is fully programmable and the information availabl e via two diagnostic pins is selectable. the status of each amplifier (output offset, load or no load, short-circuit or speaker incorrectly connected) can be read separately. 2. features and benefits 2.1 general ? operates in legacy mode (non i 2 c-bus) and i 2 c-bus mode (3.3 v and 5 v compliant) ? three hardware-programmable i 2 c-bus addresses ? drives 4 ? or 2 ? loads ? speaker fault detection ? independent short-circui t protection per channel ? loss of ground and open v p safe (with 200 m ? series impedance and a supply decoupling capacitor of 2200 ? f maximum) ? all outputs short-circuit proof to ground, supply voltage and across the load ? all pins short-circuit proof to ground ? temperature-controlled gain reduction to prevent audio holes at high junction temperatures ? low battery voltage detection ? offset detection ? this part has been qualified in accordance with aec-q100 2.2 i 2 c-bus mode ? dc load detection: open-circuit, short-circuit and load present ? ac load (tweeter) detection ? during start-up, can detect which load is connected so the appropriate gain can be selected without audio pop ? independently selectable soft mute of front channels (channel 1 and channel 3) and rear channels (channel 2 and channel 4) ? programmable gain (26 db and 16 db) of front channels (channel 1 and channel 3) and rear channels (channel 2 and channel 4) tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier rev. 5 ? 11 june 2013 product data sheet
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 2 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier ? fully programmable diagnostic levels can be set: ? programmable clip detection: 2 %, 5 % or 10 % ? programmable thermal pre-warning ? selectable information on the diag and stb pins: ? the stb pin can be programmed/multiplexed with second clip detection ? clip information of each channel can be dire cted separately to the diag pin or the stb pin ? independent enabling of thermal, clip or lo ad fault detection (short across or to v p or to ground) on diag pin 3. quick reference data 4. ordering information table 1. quick reference data symbol parameter conditions min typ max unit v p supply voltage r l =4 ? 8 14.4 18 v i q quiescent current no load - 270 400 ma p o output power v p = 14.4 v r l =4 ? ; thd = 0.5 % 19 22 - w r l =4 ? ; thd = 10 % 26 28 - w r l =4 ? ; maximum power; v i = 2 v (rms) square wave 42 44 - w r l =2 ? ; maximum power; v i = 2 v (rms) square wave 70 75 - w thd total harmonic distortion r l =4 ? ; f = 1 khz; p o =1w to12w - 0.01 0.1 % v n(o) output noise voltage filter 20 hz to 22 khz; r s =1k ? normal mode - 45 65 ? v line driver mode - 22 29 ? v table 2. ordering information type number package name description version TDA8594J dbs27p plastic dil-bent-sil (special bent) power package; 27 leads (lead length 6.8 mm) sot827-1 tda8594sd rdbs27p plastic rectangular-dil-bent-sil (reverse bent) power package; 27 leads (row spacing 2.54 mm) sot878-1
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 3 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 5. block diagram fig 1. block diagram 001aad119 standby/ fast mute i 2 c-bus interface mute protection/ diagnostic 26 db/ 16 db protection/ diagnostic 26 db/ 16 db protection/ diagnostic 26 db/ 16 db protection/ diagnostic 26 db/ 16 db mute mute mute 5 10 8 18 20 6 4 22 24 27 17 9 14 sgnd svr adsel sda v p1 v p2 in4 in2 in3 in1 stb acgnd pgnd1 pgnd3 pgnd4 11 15 13 16 12 1 26 scl 23 21 7 2 3 19 25 diag out1+ out1? out3+ out3? out2+ out2? out4+ out4? tab v p pgnd2 tda8594 clip detect/diagnostic clip detect/diagnostic
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 4 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 6. pinning information 6.1 pinning 6.2 pin description fig 2. pin configuration tda8594 001aad120 adsel stb pgnd2 out2? diag out2+ v p2 out1? pgnd1 out1+ svr in1 in2 sgnd in4 in3 acgnd out3+ pgnd3 out3? v p1 out4+ scl out4? pgnd4 sda tab 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 table 3. pin description symbol pin description adsel 1 i 2 c-bus address select input stb 2 standby (i 2 c-bus mode) or mode pin (legacy mode); programmable second clip indicator pgnd2 3 power ground channel 2 out2 ? 4 negative channel 2 output diag 5 diagnostic/clip detection output out2+ 6 positive channel 2 output v p2 7 supply voltage 2
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 5 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier to keep the output pins on the front side, special reverse bending is applied. 7. functional description the tda8594 is a complementary quad btl audio power amplifier made in bcdmos technology. it contains four independent amplifiers in btl configuration (see figure 1 ). through the i 2 c-bus, the diagnostic functions of temp erature level and c lip level are fully programmable and the information to be s hown on the two diagnostic pins can be selected. the status of each amplifier (output offset, load or no load, short-circuit or speaker incorrectly connected) can be read se parately. the tda8594 is protected against overvoltage, short-circuit, over-temperature, open ground and open v p connections. three different i 2 c-bus addresses are selected with an external resistor connected to the adsel pin. if the adsel pin is short-circuit to ground, the tda8594 operates in legacy mode. in this mode, no i 2 c-bus is needed and t he function of the st b pin will change from two-level (standby mode and on mode) to a three-level pin (standby mode, on mode and mute). 7.1 input stage the input stage is a high-impedance pseudo-differential input stage. the negative inputs of the four channels are combined on th e acgnd pin. for the best performance on supply voltage ripple rejection and pop noise , the capacitor connected to the acgnd pin must be four times the value of the input capacitor (or as close to the value as possible). out1 ? 8 negative channel 1 output pgnd1 9 power ground channel 1 out1+ 10 positive channel 1 output svr 11 half supply filter capacitor in1 12 channel 1 input in2 13 channel 2 input sgnd 14 signal ground in4 15 channel 4 input in3 16 channel 3 input acgnd 17 ac ground input out3+ 18 positive channel 3 output pgnd3 19 power ground channel 3 out3 ? 20 negative channel 3 output v p1 21 supply voltage 1 out4+ 22 positive channel 4 output scl 23 i 2 c-bus clock input out4 ? 24 negative channel 4 output pgnd4 25 power ground channel 4 sda 26 i 2 c-bus data input/output tab 27 heatsink connection, must be connected to ground table 3. pin description ?continued symbol pin description
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 6 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 7.2 output stage the output stage of each amplifier channel c onsists of two pmos power transistors and two nmos transistors in a btl configuration. the process used is the bcdmos process with an isolated substrate, silicon on insula tor (soi) process, which has almost no parasitic components and therefore prevents latch-up. 7.3 distortion (clip) detection if the output of the amplifier starts clipping to the supply voltage or to ground, the output will become distorted. if the distortion per ch annel exceeds a selectable threshold (2 %, 5 % or 10 %), one of the two diagnostic pins (d iag pin or stb pin) will be activated. to be able to detect if, for instance, the front channels (channel 1 and channel 3) or rear channels (channel 2 and channel 4) are clipping, the clip information can be directed per channel to the diag pin or the stb pin. it is possible to have only the clip information on the diagnostic pins by disabling the temperat ure and load information on the diag pin. in this mode the temperat ure and load protection are still fu nctional but can only be read via the i 2 c-bus. 7.4 output protection and short-circuit operation when a short-circuit to ground, v p or across the load occurs on one or more outputs of an amplifier, only the amplifier wit h the short-circuit is switched off. the channel that has a short-circuit and the type of shor t-circuit can be read-back via the i 2 c-bus. if the diag pin is enabled for load fault information (ib2[d 4] = 0) the diag pin will be pulled low. after 16 ms the amplifier will be switch ed on again and, if the short-circuit conditions still occur, the amplifier will be switched off. the 16 ms cycle will reduce the dissipation. to prevent audible distortion, the amplifier channel with the short-circuit can be disabled via the i 2 c-bus. 7.5 soar protection the output transistors are pr otected by safe operating area (soar) protection. the tda8594 has a two-stage soar protection: ? if the differential output voltage across the load is less than 1 v, and the current through the load is more than 4 a, the amplifier channel will be switched off for 16 ms. to prevent incorrect switch-off with an inducti ve load or very high input signals, the condition (v o < 1 v and i l > 4 a) must exist for more than 300 ? s. ? if the differential output voltage across the load is more than 1 v, and the current through the load is more than 8 a, the am plifier channel will be switched off for 16 ms. 7.6 speaker protection to prevent damage of the speaker when one si de of the speaker is connected to ground, a missing current protection is implemented. when in one channel the current in the high side power is not equal to the current in the low side power, a fault condition is assumed and the channel will be switched off. the speaker protection will be activated under the following conditions: ? v o < 1.75 v and i missing(det) >1a for 80 ? s ? v o > 1.75 v and i missing(det) >3a for 80 ? s
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 7 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 7.7 standby and mute operation the function of the stb pin is different in legacy mode and i 2 c-bus mode. 7.7.1 legacy mode (pin adsel connected to ground) the function of the stb pin will change from standb y/operating to sta ndby/mute/operating and the amplifier will start direct ly when the stb is put into mute or operating mode. mute operating is controlled via an internal time r (20 ms) to minimize mute-on pops. when the stb pin is switched directly fr om operating to standby, first the fast mute will be activated (switching to mute within 100 ? s) and then the am plifier will shut-down. 7.7.2 i 2 c-bus mode when the stb pin is low, the total quiescent current is low, and the i 2 c-bus lines will not be loaded. when the stb pin is switched high, the tda8 594 is put in operating condition and will perform a power-on reset (por ), which results in a low le vel diag pin. the tda8594 will start up when instruct ion bit ib1[d0] is set. bit d0 will also reset the ?power-on reset occurred? bit (db2[d7]) an d releases the diag pin. the soft mute and fast mute can be activated via the i 2 c-bus. the soft mute can be activated independently for the front channels (channel 1 and channel 3) and rear channels (channel 2 and channel 4), and mutes the audio in 20 ms. the fast mute activates the mute for all channels at the same time and mutes the audio in 0.1 ms. releasing the mute af ter a fast mute will be by a soft un-mute of approximately 20 ms. when the stb pin is switched to standby mode and the amplifier has started, first the fast mute will be activated and then the amplif ier will shut-down. for instance, during an engine start, it is possible to fully mute the am plifiers within 100 ? s by switching the stb pin to zero. 7.8 start-up and shut-down sequence to prevent the amplifier producing switch-on or switch-off pop noise, the capacitor on the svr pin is used for smooth start-up and sh ut-down. increasing the value of the svr capacitor will mean a longer st art-up and shut-down time. the amplifier output voltage is charged to half the supply voltage minus 1. 4 v in mute condition, independent of the i 2 c-bus mute settings in i 2 c-bus mode or stb voltage in legacy mode. the last 1.4 v, where the output will reach half the supply voltage, is used to release the mute if the i 2 c-bus bits were set to mute off (ib2[d2:d0] = 000; v stb > 6.5 v in legacy mode), or will stay in mute when the bits were set to mute (2.6 v < v stb < 4.5 v in legacy mode). when the amplifier is switched off by pulling the stb pin low, the amplifier is first muted (fast mute) and then the capacitor on the svr pi n is discharged. with an svr capacitor of 22 ? f, the standby current has reached 1 second after the stb pin is switched to zero (see figure 3 , figure 4 , figure 5 and figure 6 ). the start-up and shut-down pop can be further decreased by activating the low pop mode. when the low pop mode is enabled (ib2[d3] = 0), the output voltage rise from ground level during start-up will be slower (see figure 5 ). this will decrease the pop even more but will increase the start-up time.
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 8 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier fig 3. start-up and shut-down timing in i 2 c-bus mode t amp_on t d(mute_off) fast mute v p diag db2 bit d7 por ib1 bit d0 start enable 001aad168 stb svr amplifier output t off t wake t d(soft_mute) t d(fast_mute)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 9 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier fig 4. start-up and shut-down timing with dc load active in i 2 c-bus mode t amp_on t d(mute_off) fast mute v p diag db2 bit d7 por ib1 bit d0 start enable 001aad169 stb svr amplifier output t off t load t wake t d(soft_mute) t d(fast_mute)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 10 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier fig 5. start-up and shut-down timing with low audible pop and dc load activated t amp_on t d(mute_off) fast mute v p diag db2 bit d7 por ib1 bit d0 start enable 001aad170 stb svr amplifier output t off t load t wake t d(soft_mute) t d(fast_mute)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 11 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 7.9 power-on reset and supply voltage spikes if in i 2 c-bus mode the supply voltage drops below 5 v (see figure 9 ), the content of the i 2 c-bus latches cannot be guaranteed and the power-on reset will be activated. all latches are reset, the amplifier is switched off and the diag pin is pulled low to indicate that a power-on reset has occurred (bit db2[d7]). when ib1[d0] is set, the power-on flag is reset, the diag pin will be released and the amplifier will start up. in legacy mode a supply voltage drop below 5 v will switch off the am plifier and the diag pin will not be pulled low. 7.10 engine start and low voltage operation the dc output voltage of the amplifier (v o ) is set to half of the supply voltage and is related to the voltage on the svr pin (see figure 7 ; v o =v svr ? 1.4 v). a capacitor is connected on the svr pin to suppress the ripple on the power supply. if the supply voltage drops, for instance, duri ng an engine start, the output follows slowly due to the svr capacitor. the headroom voltage is the voltage needed for good operation of the amplifier and is defined as v hr =v p ? v o (see figure 7 ). if the headroom voltage becomes lower than the headroom protection threshold of 1.6 v, the headroom protection is activated to prevent pop noise at the output. this protection first activates the fast mute and then discharges the capacitors on the svr and acgnd pins to generate more headroom for the amplifier (see figure 8 ). fig 6. start-up and shut-down timing in legacy mode t amp_on t d(mute_off) fast mute soft mute v p diag 001aad171 stb on mute standby svr amplifier output t off t d(soft_mute) t d(mute_on) t d(fast_mute)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 12 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier when the svr capacitor has discharged, the amplifier starts up again if the v p voltage is above the low v p mute threshold, typically 7.5 v. below the low v p mute threshold, the outputs of the amplifier remain low. in i 2 c-bus mode, a supply voltage drop below v p(reset) , typically 5 v, results in setting bit db2[d7] and no t starting of the amp lifiers but waiting for an i 2 c-bus command to start. the amplifier prevents audio pops during engine start. to prevent pops on the output caused by the application during an engine start (for instance tuner regulator out of regulation), the stb pin can be made zero when an engine start is detected. the stb pin activates the fast mute and disturbances at the amplifier inputs are suppressed. (1) headroom voltage v hr =v p ? v o . (2) steady state output voltage v o =v svr ? 1.4 v. (3) headroom protection threshold = v o +1.6v. fig 7. low headroom protection v (v) t (s) v svr v o (2) headroom protection threshold (3) 1.6 v v hr (1) v p 001aad172 14 8.4 7
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 13 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier (1) headroom protection activated: a) fast mute b) discharge of svr. (2) low v p mute activated. (3) low v p mute released. fig 8. low v p behavior; legacy and i 2 c-bus modes t (s) v o (v) v hr 14.4 legacy and i 2 c-bus mode 8.8 8.6 7.2 3.5 v p v svr t (start-svroff) t (start-vo(off)) output voltage (1) (2) (3) (3) 001aad173 output voltage
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 14 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 7.11 overvoltage and load dump protection when the battery voltage v p is higher than 22 v, the am plifier stage will be switched to high-impedance. the tda8594 is protected against load dump voltage with supply voltage up to 50 v. 7.12 thermal pre-warning and thermal protection if the average junction temperature reaches a level that is adjustable via the i 2 c-bus, selected with ib3[d4], the pr e-warning will be activated re sulting in a low level on pin diag (if selected) and can be read out via the i 2 c-bus. the default setting for the thermal pre-warning is ib3[d4] = 0 setting the warning level at 145 ? c. in legacy mode the thermal pre-warning is set at 145 ? c. if the temperature increases further, the temp erature controlled gain reduction will be activated for all four channels to reduce the output power (see figure 10 ). if this does not reduce the average junction temperature, all four channels will be switched off at the absolute maximum temperature t off , typical 175 ? c. (1) low v p mute activated. (2) v por : v p level at which power-on reset (por) is activated. fig 9. low v p behavior; i 2 c-bus mode only 14.4 8.8 8.6 7.2 3.5 0 v p v svr output voltage diag por ib1 bit d0 5.0 001aad185 v o (v) i 2 c-bus mode only (1) (2) t (s)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 15 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 7.13 diagnostics diagnostic information can be read via the i 2 c-bus, and can also be available on the diag pin or on the stb pin. the diag pin has both fixed information (power-on reset occurred, low battery and high battery) and, via the i 2 c-bus, selectable information (temperature, load fault and clip). this inform ation will be seen at the diag pin as a logic or. in case of a failure, the diag pin remains low and the failure information can be read from the microprocessor via the i 2 c-bus (the diag pin can be used as a microprocessor interrupt to minimize i 2 c-bus traffic). when the failure is removed, the diag pin will be released. to have full control over the clipping information, the stb pin can be programmed as a second clip detection pin. the clip detection le vel can be selected for all channels at once. it is possible to select whether the clip inform ation is available on the diag pin or on the stb pin for each channel separately. it is, for instance, possible to distinguish between clipping of the front and the rear channels. diagnostic information selectio n possibilities are shown in table 4 . fig 10. temperature controlled amplifier gain t j (c) 145 175 165 155 001aad174 10 20 30 g v (db) 0 table 4. diagnostic information availability diagnostic information i 2 c-bus mode legacy mode diag pin stb pin diag pin por after power-on reset, diag pin will remain low until amplifier has been started no no low battery yes no yes clip detection can be enabled per channel can be enabled per channel yes, fixed level for all channels on 2 % temperature pre-warning can be enabled no yes, pre-warning level is 145 ?c short can be enabled no yes speaker protection (missing current) can be enabled no yes
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 16 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 7.14 offset detection the offset detection can be performed with no input signal (for instance when the digital signal processor is in mute after a start-up) or with an input signal. in i 2 c-bus mode, if an i 2 c-bus read of the output of fset is performed, the i 2 c-bus latches dbx[ d2] will be set. when the amplifier btl output voltage is within a window with a threshold of 1.75 v typical, the latches dbx[d2] are reset and setting is disabled. if, for instance, after 1 second an i 2 c-bus read is performed again and the of fset bits are still se t, the output has not crossed the offset threshold during the last 1 second (see figure 11 ). this can mean the applied frequency is below 1 hz (i 2 c-bus read interval = 1 s) or an output offset of more than 1.75 v is present. 7.15 dc load detection when the dc load detection is enabled with ib 1[d1], a dc offset is slowly applied at the output of the amplifiers during the start-up cycle and the load currents are measured. different load levels will be detected to differen tiate between normal lo ad, line driver load or open load. offset detection no no no load detection no no no overvoltage yes no yes table 4. diagnostic information availability ?continued diagnostic information i 2 c-bus mode legacy mode diag pin stb pin diag pin fig 11. offset detection 001aad175 reset: setting disabled offset threshold v o = v out+ ? v out? v o = v out+ ? v out? i 2 c-bus mode only offset threshold t = 1 s: read = no offset db1 bit d2 reset t = 1 s: read = offset db1 bit d2 set read = set bit t t
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 17 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier if the amplifier is used as line driver and the external booster has an input impedance of more than 100 ? and less than 800 ? (dc-coupled), the dc load bits will contain dbx[d5:d4] = 10, independent of the gain setting (see ta b l e 5 ). by reading the i 2 c-bus bits the microprocessor can determine, after the start-up of the amplifier, whether a speaker or an external booster is connected. depending on these bits, the amplifier gain can be selected, 26 db for normal mode or 16 db for line driver mode. if the gain select is performed when the amplifier is muted, the gain select will be pop free. the dc load bits are combined with the ac load bits and are only valid when the ac load detection is disabled. when the ac load detection is enabled (ib1[d2] = 1), the bits dbx[d4] will show the content of the ac load detection. when the ac load detection is disabled again, bit dbx[d4] will show the conten t of the dc load measurement, which was stored during the ac load measurement. the ac load detection can only be performed after the amplifier has comple ted its start-up cycle and w ill not conflict with the dc load detection. 7.16 ac load detection the ac load detection, enabled with ib1[d2] = 1, is used to detect if ac-coupled speakers, for example tweeters, are connected correctly during assembly. the detection is audible because a sine wave of a certain frequency (e.g. 19 khz) needs to be applied to the inputs of the amplifier. the output voltage over the lo ad impedance will generate an amplifier current. if the amplifier peak curren t triggers a 460 ma (peak) threshold detector three times, the ac load detection bit will be se t. a three ?thr eshold cross? counter is used to prevent false ac load detection when switching the input signal on or off. an ac-coupled speaker will reduce the impe dance at the output of the amplifier in a certain frequency band. the presence of an ac-coupled speaker can be determined using 460 ma (peak) and 230 ma (peak) threshold current detection. for instance, at an output voltage of 2 v (peak) the total impedance must be less than 4 ? to detect the ac-coupled load, or more than 8 ? to guarantee only a dc connection is detected. fig 12. dc load detection levels table 5. dc load detection dc load bits meaning (when ib1[d2] = 0) dbx[d5] dbx[d4] 0 0 normal load 1 0 line driver load 1 1 open load 0 1 not valid 001aad176 20 800 100 5 k load detection level normal line driver mode open-circuit
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 18 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier the interpretation of line driver and normal mode dc load bit settings for ac load detection is shown in ta b l e 6 . when bit ib1[d2] = 1, the ac load detection is enabled. the ac load detection can only be performed after the amplifie r has completed its start-up cycle and will not conflict with the dc load detection. 7.17 i 2 c-bus diagnostic readout the diagnostic information of the amplifier can be read via the i 2 c-bus. the i 2 c-bus bits are set on a failure a nd will be reset with the i 2 c-bus read command. even when the failure is removed, the mi croprocessor will know what was wrong by reading the i 2 c-bus. the consequence of this procedure is that old information is read during the i 2 c-bus readout. most actual information will be ga thered after two successive read commands. the diag pin will give actual diagnostic information (when se lected). when a failure is removed, the diag pin will be releas ed instantly, indep endently of the i 2 c-bus latches. table 6. ac load detection dbx[d4] meaning (when ib1[d2] = 1) 0 no ac load detected 1 ac load detected (1) i th(o)det(load)ac < 230 ma (no load detection level) (2) i th(o)det(load)ac > 460 ma (load detection level) fig 13. ac load impedance as a function of peak output voltage v om (v) 0 5 4 23 1 001aad177 8 12 4 16 20 |z th(load) | () 0 (1) (2)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 19 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 8. i 2 c-bus specification table 7. tda8594 hardware address select pin adsel a6 a5 a4 a3 a2 a1 a0 r/w open 11011000=write to tda8594 1 = read from tda8594 51 k ? to ground11011010=write to tda8594 1 = read from tda8594 10 k ? to ground11011110=write to tda8594 1 = read from tda8594 ground no i 2 c-bus; legacy mode fig 14. definition of start and stop conditions fig 15. bit transfer mba608 sda scl p stop condition s start condition mba607 data line stable; data valid change of data allowed sda scl
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 20 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 8.1 instruction bytes i 2 c-bus mode: ? if bit r/w = 0, the tda8594 expects three instruction bytes; ib1, ib2 and ib3 ? after a power-on reset, all instruction bits are set to zero. legacy mode: ? all bits equal to zero define the setting, with the exception of bit ib1[d0] which is ignored; see ta b l e 8 . fig 16. i 2 c-bus read and write modes 001aac649 ack msb ? 1 msb ? 1 msb msb lsb + 1 lsb lsb + 1 12 78912 789 12 78912 789 : generated by master (microcontroller) to stop the transfer, after the last acknowledge (a) a stop condition (p) must be generated to stop the transfer, the last byte must not be acknowledged and a stop condition (p) must be generated : generated by slave : start : stop : acknowledge : read / write s p a r/w : not acknowledge na scl sda scl sda ack ack msb msb ? 1 msb msb ? 1 lsb + 1 lsb lsb + 1 ack s a a ap na p address write data read data w s address r i 2 c-bus write i 2 c-bus read table 8. instruction byte ib1 bit description d7 don?t care d6 channel 3 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin d5 channel 1 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 21 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier d4 channel 4 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin d3 channel 2 clip information on diag or stb pin 0 = clip information on diag pin 1 = clip information on stb pin d2 ac load detection enable 0 = ac load detection disabled 1 = ac load detection enabled; dbx[d4] bits not available for dc load detection d1 dc load detection enable 0 = dc load detection disabled 1 = dc load detection enabled d0 amplifier start enable 0 = amplifier not enabled, diag pin will remain low 1 = amplifier will start up, power-on occurred (db2[d7] will be reset) and diag pin will be released table 9. instruction byte ib2 bit description d7 and d6 clip detection level 00 = clip detection level 2 % 01 = clip detection level 5 % 10 = clip detection level 10 % 11 = clip detection level disabled d5 temperature information on diag pin 0 = temperature information on diag pin 1 = no temperature information on diag pin d4 load fault information (shorts, missing current) on diag pin 0 = fault information on diag pin 1 = no fault information on diag pin d3 low pop (slow start) enable 0 = low pop enabled 1 = low pop disabled d2 soft mute channel 1 and channel 3 (mute delay 20 ms) 0=no mute 1=mute d1 soft mute channel 2 and channel 4 (mute delay 20 ms) 0=no mute 1=mute table 8. instruction byte ib1 ?continued bit description
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 22 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 8.2 data bytes i 2 c-bus mode: ? if bit r/w = 1, the tda8594 sends four data bytes to the microprocessor: db1, db2, db3, and db4 ? all bits except db1[d7] and db3[d7] are latched. ? all bits except dbx[d4] and dbx[d5] are rese t after a read operation. bit dbx[d2] is set after a read operation; see section 7.14 ? for explanation of ac and dc load detection bits; see section 7.15 and section 7.16 . d0 fast mute all amplifier channels (mute delay 100 ? s) 0=no mute 1=mute table 10. instruction byte ib3 bit description d7 don?t care d6 amplifier channel 1 and channel 3 gain select 0=26db 1=16db d5 amplifier channel 2 and channel 4 gain select 0=26db 1=16db d4 temperature pre-warning level 0 = warning level on 145 ?c 1 = warning level on 122 ?c d3 disable channel 3 0 = channel 3 enabled 1 = channel 3 disabled d2 disable channel 1 0 = channel 1 enabled 1 = channel 1 disabled d1 disable channel 4 0 = channel 4 enabled 1 = channel 4 disabled d0 disable channel 2 0 = channel 2 enabled 1 = channel 2 disabled table 9. instruction byte ib2 ?continued bit description
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 23 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier table 11. data byte db1 bit description d7 temperature pre-warning 0 = no warning 1 = junction temperature too high d6 speaker fault channel 2 (missing current) 0 = no missing current 1 = missing current d5 and d4 channel 2 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 is don?t care, bit d4 has the following meaning 0=no ac load 1 = ac load detected if bit ib1[d2] = 0, ac load detection is di sabled, bits d5 and d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 2 shorted load 0 = not shorted load 1 = shorted load d2 channel 2 output offset 0 = no output offset 1 = output offset d1 channel 2 short to v p 0 = no short to v p 1 = short to v p d0 channel 2 short to ground 0 = no short to ground 1 = short to ground table 12. data byte db2 bit description d7 power-on reset and amplifier status 0 = amplifier on 1 = power-on reset has o ccurred; amplifier off d6 speaker fault channel 4 (missing current) 0 = no missing current 1 = missing current
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 24 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier d5 and d4 channel 4 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 is don?t care, bit d4 has the following meaning 0=no ac load 1 = ac load detected if bit ib1[d2] = 0, ac load detection is di sabled, bits d5 and d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 4 shorted load 0 = not shorted load 1 = shorted load d2 channel 4 output offset 0 = no output offset 1 = output offset d1 channel 4 short to v p 0 = no short to v p 1 = short to v p d0 channel 4 short to ground 0 = no short to ground 1 = short to ground table 13. data byte db3 bit description d7 maximum temperature protection 0 = no protection 1 = maximum temperature protection d6 speaker fault channel 1 (missing current) 0 = no missing current 1 = missing current table 12. data byte db2 ?continued bit description
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 25 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier d5 and d4 channel 1 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 is don?t care, bit d4 has the following meaning 0=no ac load 1 = ac load detected if bit ib1[d2] = 0, ac load detection is di sabled, bits d5 and d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load d3 channel 1 shorted load 0 = not shorted load 1 = shorted load d2 channel 1 output offset 0 = no output offset 1 = output offset d1 channel 1 short to v p 0 = no short to v p 1 = short to v p d0 channel 1 short to ground 0 = no short to ground 1 = short to ground table 14. data byte db4 bit description d7 reserved d6 speaker fault channel 3 (missing current) 0 = no missing current 1 = missing current d5 and d4 channel 3 dc load or ac load detection if bit ib1[d2] = 1, ac load detection is enabled, bit d5 is don?t care, bit d4 has the following meaning 0=no ac load 1 = ac load detected if bit ib1[d2] = 0, ac load detection is di sabled, bits d5 and d4 are available for dc load detection 00 = normal load 01 = not valid 10 = line driver load 11 = open load table 13. data byte db3 ?continued bit description
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 26 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 9. limiting values d3 channel 3 shorted load 0 = not shorted load 1 = shorted load d2 channel 3 output offset 0 = no output offset 1 = output offset d1 channel 3 short to v p 0 = no short to v p 1 = short to v p d0 channel 3 short to ground 0 = no short to ground 1 = short to ground table 14. data byte db4 ?continued bit description table 15. limiting values in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit v p supply voltage operating 8 18 v non operating ? 1+50v load dump protection; duration 50 ms, rise time > 2.5 ms -50v v p(r) reverse supply voltage t max = 10 minutes - ? 2v i osm non-repetitive peak output current -13a i orm repetitive peak output current -8a t j(max) maximum junction temperature -150 ?c t stg storage temperature ? 55 +150 ?c t amb ambient temperature ? 40 +105 ?c v (prot) protection voltage ac and dc short-circuit of output pins and across the load -v p v v x voltage on pin x pins scl and sda 0 6.5 v pins in1, in2, in3, in4, svr, acgnd and diag 013v pin stb 0 24 v
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 27 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 10. thermal characteristics 11. characteristics p tot total power dissipation t case = 70 ? c-8 0w v esd electrostatic discharge voltage human body model; c = 100 pf; r s =1.5k ? -2000v machine model; c = 200 pf; r s =10 ? ; l s =0.75 ? h -200v table 15. limiting values ?continued in accordance with the absolute maximum rating system (iec 60134). symbol parameter conditions min max unit table 16. thermal characteristics symbol parameter conditions typ unit r th(j-c) thermal resistance from junction to case 1k/w r th(j-a) thermal resistance from junction to ambient in free air 40 k/w table 17. characteristics refer to figure 29 at v p =v p1 =v p2 = 14.4 v; r l =4 ? ; f = 1 khz; r s =0 ? ; normal mode; unless otherwise specified. tested at t amb =25 ? c; guaranteed for t amb = ? 40 ? c to +105 ? c. symbol parameter conditions min typ max unit supply voltage behavior v p supply voltage r l = 4 ? 8 14.4 18 v r l = 2 ? [1] 8 14.4 16 v i q quiescent current no load - 270 400 ma i stb standby current v stb = 0.4 v - 4 15 ? a v o output voltage 6.7 7 7.2 v v p(low)(mute) low supply voltage mute with rising supply voltage 6.9 7.5 8 v with falling supply voltage 6.3 6.8 7.4 v ? v p(low)(mute) low supply voltage mute hysteresis 0.1 0.7 1 v v th(ovp) overvoltage protection threshold voltage 18 20 22 v v hr headroom voltage when headroom protection is activated; see figure 7 1.11.62.0v v por power-on reset voltage see figure 9 4.15.05.8v v o(offset) output offset voltage amplifier on ? 95 0 +95 mv amplifier mute ? 25 0 +25 mv line driver mode ? 40 0 +40 mv r l(tol) load resistance tolerance v p ? 18 v 3.2 4 - ? v p ? 16 v 1.6 2 - ?
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 28 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier mode select and second clip detection: pin stb v stb voltage on pin stb standby mode selected i 2 c-bus mode - - 1 v legacy mode (i 2 c-bus off) - - 1 v mute selected legacy mode (i 2 c-bus off) 2.5 - 4.5 v operating mode selected i 2 c-bus mode 2.5 - v p v legacy mode (i 2 c-bus off) 6.5 - v p v low voltage on pin stb when pulled down during clipping [2] i stb = 150 ? a5.6-6.1v i stb = 500 ? a6.1-7.2v i stb current on pin stb v stb =0vto8.5v clip detection not active; i 2 c-bus mode -430 ? a legacy mode - 10 70 ? a start-up, shut-down and mute timing t wake wake-up time time afte r wake-up via stb pin before first i 2 c-bus transmission is recognized; see figure 3 - 300 500 ? s i lo(svr) output leakage current on pin svr --10 ? a t d(mute_off) mute off delay time 10 % of output signal; i lo = 0 ? a [3] i 2 c-bus mode; with i lo =10 ? a ? +15 ms; no dc load (ib1[d1] = 0); low pop disabled (ib2[d3] = 1); see figure 3 295 465 795 ms i 2 c-bus mode; with i lo =10 ? a ? +20 ms; dc load active (ib1[d1] = 1); low pop disabled (ib2[d3] = 1); see figure 4 500 640 940 ms i 2 c-bus mode; with i lo =10 ? a ? +20 ms; dc load active (ib1[d1] = 1); low pop enabled (ib2[d3] = 0); see figure 5 640 830 1190 ms legacy mode; with i lo =10 ? a ? +20 ms; v stb =7v; r adsel =0 ? ; see figure 6 430 650 1030 ms table 17. characteristics ?continued refer to figure 29 at v p =v p1 =v p2 = 14.4 v; r l =4 ? ; f = 1 khz; r s =0 ? ; normal mode; unless otherwise specified. tested at t amb =25 ? c; guaranteed for t amb = ? 40 ? c to +105 ? c. symbol parameter conditions min typ max unit
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 29 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier t amp_on amplifier on time time from amplifier mute to amplifier on; 90 % of output signal; i lo = 0 ? a [3] i 2 c-bus mode; with i lo =10 ? a ? +30 ms; no dc load (ib1[d1] = 0); low pop disabled (ib2[d3] = 1); see figure 3 360 520 870 ms i 2 c-bus mode; with i lo =10 ? a ? +35 ms; dc load active (ib1[d1] = 1); low pop disabled (ib2[d3] = 1); see figure 4 565 695 1015 ms i 2 c-bus mode; with i lo =10 ? a ? +30 ms; dc load active (ib1[d1] = 1); low pop enabled (ib2[d3] = 0); see figure 5 710 890 1270 ms legacy mode; with i lo =10 ? a ? +20 ms; v stb =7v; r adsel =0 ? ; see figure 6 510 720 1120 ms t off amplifier switch-off time time to dc output voltage < 0.1 v; i 2 c-bus mode; i lo =0 ? a [3] with i lo =10 ? a ? +0 ms; low pop enabled (ib2[d3] = 0); see figure 4 120 245 530 ms with i lo =10 ? a ? +0 ms; low pop disabled (ib2[d3] = 1); see figure 5 140 280 620 ms t d(mute-on) mute to on delay time from 10 % to 90 % of output signal; ib2[d1] and ib2[d2] = 1 to 0; v i =50mv; see figure 6 -2040ms t d(soft_mute) soft mute delay time from 90 % to 10 % of output signal; v i = 50 mv; ib2[d1] and ib2[d2] = 0 to 1 (soft mute); see figure 6 -2040ms t d(fast_mute) fast mute delay time from 90 % to 10 % of output signal; v stb from 8 v to 1.3 v (fast mute); see figure 6 -0.11ms t (start-vo(off)) engine start to output off time v p from 14.4 v to 7 v; v o <0.5v; see figure 8 -0.11ms t (start-svroff) engine start to svr off time v p from 14.4 v to 7 v; v svr < 2 v; see figure 8 -4075ms i 2 c-bus interface [4] v il low-level input voltage pins scl and sda - - 1.5 v v ih high-level input voltage pins scl and sda 2.3 - 5.5 v v ol low-level output voltage pin sda; i l = 5 ma - - 0.4 v table 17. characteristics ?continued refer to figure 29 at v p =v p1 =v p2 = 14.4 v; r l =4 ? ; f = 1 khz; r s =0 ? ; normal mode; unless otherwise specified. tested at t amb =25 ? c; guaranteed for t amb = ? 40 ? c to +105 ? c. symbol parameter conditions min typ max unit
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 30 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier f scl scl clock frequency - 400 - khz r adsel resistance on pin adsel i 2 c-bus address a[6:0] = 110 1100 155 - - k ? i 2 c-bus address a[6:0] = 110 1101 42 51 57 k ? i 2 c-bus address a[6:0] = 110 1111 71015k ? legacy mode - - 0.5 k ? diagnostic v ol(diag) low-level output voltage on pin diag fault condition; i diag = 1 ma - - 0.3 v v o(offset_det) output voltage at offset detection ? 1.5 ? 1.75 ? 2.2 v thd clip total harmonic distortion clip detection level ib2[d7:d6] = 10 5 10 18 % ib2[d7:d6] = 01 3 5 9 % ib2[d7:d6] = 00 1 2 3 % ? thd clip total harmonic distortion clip detection leve l variation no overlap between ib2[d7:d6] = 10 and ib2[d7:d6] = 01 149% no overlap between ib2[d7:d6] = 01 and ib2[d7:d6] = 00 13.56% t j(av)(pwarn) pre-warning average junction temperature ib3[d4] = 0 135 145 155 ?c ib3[d4] = 1 112 122 132 ?c t j(av)(g( ? 0.5db)) average junction temperature for 0.5 db gain reduction v i = 0.05 v 150 155 160 ?c ? t j(pw-g( ? 0.5db)) prewarning to 0.5 db gain reduction junction temperature difference 71013 ?c ? t j(g( ? 0.5db)-of) junction temperature difference between 0.5 db gain reduction and off from thermal foldback to when all outputs are switched off 10 15 20 ?c ? g (th_fold) gain reduction of thermal foldback all channels switched off - 20 - db z th(load) load detection threshold impedance i 2 c-bus mode normal load detection - - 20 ? line driver load detection 100 - 800 ? z th(open) open load detection threshold impedance i 2 c-bus mode 5000 - - ? i th(o)det(load)ac ac load detection output threshold current i 2 c-bus mode ac load bit is set 460 - - ma ac load bit is not set - - 230 ma table 17. characteristics ?continued refer to figure 29 at v p =v p1 =v p2 = 14.4 v; r l =4 ? ; f = 1 khz; r s =0 ? ; normal mode; unless otherwise specified. tested at t amb =25 ? c; guaranteed for t amb = ? 40 ? c to +105 ? c. symbol parameter conditions min typ max unit
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 31 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier amplifier p o output power r l =4 ? ; v p =14.4v; thd = 0.5 % 19 22 - w r l =4 ? ; v p =14.4v; thd = 10 % 26 28 - w r l =4 ? ; v p = 14.4 v; maximum power; v i = 2 v (rms) square wave 42 44 - w r l =4 ? ; v p = 15.2 v; maximum power; v i = 2 v (rms) square wave 47 50 - w r l =2 ? ; v p =14.4v; thd = 0.5 % 34 37 - w r l =2 ? ; v p =14.4v; thd = 10 % 45 48 - w r l =2 ? ; v p = 14.4 v; maximum power; v i = 2 v (rms) square wave 70 75 - w thd total harmonic distortion p o = 1 w to 12 w; f = 1 khz; r l =4 ? - 0.01 0.1 % p o = 1 w to 12 w; f = 10 khz - 0.09 0.3 % p o = 1 w to 12 w; f = 20 khz - 0.14 0.4 % line driver mode; v o =1v(rms) and 5 v (rms), f = 20 hz to 20 khz; complex load; see figure 31 - 0.02 0.05 % ? cs channel separation f = 1 khz; r s = 1 k ? ; r acgnd =250 ? [5] 65 80 - db f = 10 khz; r s =1k ? ; r acgnd =250 ? [5] 60 65 - db svrr supply voltage ripple rejection 100 hz to 10 khz; r s =1k ? ; r acgnd =250 ? [5] 55 70 - db cmrr common mode rejection ratio normal mode; v cm = 0.3 v (p-p); f=1khzto3khz; r s =1k ? ; r acgnd =250 ? [5] 45 65 - db v cm(max)(rms) maximum common mode voltage (rms value) f = 1 khz - - 0.6 v v n(o) output noise voltage filter 20 hz to 22 khz; r s =1k ? mute mode - 19 26 ? v line driver mode - 22 29 ? v normal mode - 45 65 ? v g v voltage gain single-ended in; differential out normal mode 25.5 26 26.5 db line driver mode 15.5 16 16.5 db table 17. characteristics ?continued refer to figure 29 at v p =v p1 =v p2 = 14.4 v; r l =4 ? ; f = 1 khz; r s =0 ? ; normal mode; unless otherwise specified. tested at t amb =25 ? c; guaranteed for t amb = ? 40 ? c to +105 ? c. symbol parameter conditions min typ max unit
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 32 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier [1] operation above 16 v in a 2 ? mode with reactive load can trigger the amplifier pr otection. the amplifier switches off and will restart after 16 ms resulting in an ?audio hole?. [2] v stb depends on the current into the stb pin: minimum = (1429 ? i stb ) + 5.4 v, maximum = (3143 ? i stb )+5.6v. [3] the times are specified without leakage current. for a leakage current of 10 ? a on the svr pin, the delta time is specified. if the capacitor value on the svr pin changes with ? 30 %, the specified time will also change with ? 30 %. the specified times include an equivalent series resistance (esr) of 15 ? for the capacitor on the svr pin. [4] standard i 2 c-bus specification: maximum low level = 0.3 ? v dd , minimum high level = 0.7 ? v dd . to comply with 5 v and 3.3 v logic, the maximal low level is defined by v dd = 5 v and the minimum high level by v dd =3.3v. [5] for optimum channel separation, supply voltage ripple rejection and common mode rejection ratio, a resistor ? should be in series with the acgnd capacitor. 12. performance diagrams z i input impedance t amb = ? 40 ? c to +105 ?c5 07 09 5k ? t amb = 0 ? c to 105 ?c6 0 7 0 9 5 k ? ? mute mute attenuation v o / v o(mute) ; v i =50mv 80 92 - db v o(mute)(rms) rms mute output voltage v i = 1 v (rms); filter 20 hz to 22 khz -25- ? v b p power bandwidth ? 1 db - 20 to 20000 -hz table 17. characteristics ?continued refer to figure 29 at v p =v p1 =v p2 = 14.4 v; r l =4 ? ; f = 1 khz; r s =0 ? ; normal mode; unless otherwise specified. tested at t amb =25 ? c; guaranteed for t amb = ? 40 ? c to +105 ? c. symbol parameter conditions min typ max unit r acgnd r s 4 ----- - = v p =14.4v; r l =4 ? . (1) f = 10 khz. (2) f = 1 khz. (3) f = 100 hz. fig 17. total harmonic distortion as a function of output power 001aad121 10 ?1 10 ?2 10 1 10 2 thd (%) 10 ?3 p o (w) 10 ?2 10 2 10 10 ?1 1 (1) (2) (3)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 33 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier v p =14.4v; r l =2 ? . (1) f = 10 khz. (2) f = 1 khz. (3) f = 100 hz. fig 18. total harmonic distortion as a function of output power v p =14.4v; r l =4 ? . (1) thd = 10 %. (2) thd = 0.5 %. fig 19. output power as a function of frequency 001aad122 10 ?1 10 ?2 10 1 10 2 thd (%) 10 ?3 p o (w) 10 ?2 10 2 10 10 ?1 1 (1) (2) (3) 001aad123 f (khz) 10 ?2 10 2 10 10 ?1 1 24 26 22 28 30 p o (w) 20 (1) (2)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 34 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier v p =14.4v; r l =2 ? . (1) thd = 10 %. (2) thd = 0.5 %. fig 20. output power as a function of frequency v p =14.4v; r l =4 ? . (1) p o(max) . (2) thd = 10 %. (3) thd = 0.5 %. fig 21. output power as a function of supply voltage 001aad124 f (khz) 10 ?2 10 2 10 10 ?1 1 40 50 60 p o (w) 30 (1) (2) v p (v) 5 20 15 10 001aad125 40 20 60 80 p o (w) 0 (1) (2) (3)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 35 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier v p =14.4v; r l =2 ? . (1) p o(max) . (2) thd = 10 %. (3) thd = 0.5 %. fig 22. output power as a function of supply voltage v p =14.4v; r l =4 ? . (1) p o =1w. (2) p o =10w. fig 23. total harmonic distortion as a function of frequency; in normal mode v p (v) 5 20 15 10 001aad126 40 80 120 p o (w) 0 (1) (2) (3) 001aad127 f (khz) 10 ?2 10 2 10 10 ?1 1 10 ?1 10 ?2 1 thd (%) 10 ?3 (1) (2)
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 36 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier v p =14.4v; r l = 600 ? . (1) v o =1v. (2) v o = 5 v; front channels. fig 24. total harmonic distortion as a function of frequency in line driver mode v p =14.4v; r l =4 ? ; r s =1k ? ; v ripple = 2 v (p-p). fig 25. supply voltage ripple rejection as a function of frequency 001aad128 f (khz) 10 ?2 10 2 10 10 ?1 1 10 ?2 10 ?1 thd (%) 10 ?3 (1) (2) 001aad129 f (khz) 10 ?2 10 2 10 10 ?1 1 ?70 ?60 ?80 ?50 ?40 svrr (db) ?90
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 37 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier v p =14.4v; r l =4 ? ; r s =1k ? ; p o =1w. fig 26. channel separation as a function of frequency v p =14.4v; r l =4 ? ; f = 1 khz. fig 27. power dissipation as a function of output power 001aad130 f (khz) 10 ?2 10 2 10 10 ?1 1 70 60 80 90 cs (db) 50 p o (w) 0 40 30 20 10 001aad730 20 30 10 40 50 p (w) 0
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 38 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier v p =14.4v; r l =2 ? ; f = 1 khz. fig 28. power dissipation as a function of output power p o (w) 0 80 60 40 20 001aad731 40 60 20 80 100 p (w) 0
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 39 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 13. application information for emc reasons, a 10 nf capacitor (not shown) can be added from each amplifier output to ground. (1) for emc reasons a capacitor of 1.8 nf from the input pin to sgnd is advised (optional). (2) the svr and acgnd capacitors and the r adsel resistor should first be connected to sgnd before connecting to pgndn pins. (3) acgnd capacitor value must be close to 4 ? input capacitor value; 4 ? 470 nf capacitors can be used as an alternative to the 2.2 ? f capacitor shown. fig 29. test and application diagram 001aad132 standby/ fast mute i 2 c-bus interface clip detect/diagnostic mute protection/ diagnostic 26 db/ 16 db protection/ diagnostic 26 db/ 16 db protection/ diagnostic 26 db/ 16 db protection/ diagnostic 26 db/ 16 db mute mute mute 5 10 8 18 20 6 4 22 24 27 17 9 14 sgnd svr (2) 22 f (3) 2.2 f r adsel sda (2) adsel v p1 v p2 in4 in2 in3 in1 stb r s 470 nf (1) 1.8 nf (1) 1.8 nf (1) 1.8 nf (1) 1.8 nf 10 k 10 k 8.5 v acgnd pgnd1 pgnd3 pgnd4 11 15 13 16 12 1 26 scl 23 21 7 2 3 19 25 diag out1+ out1? out3+ out3? out2+ out2? out4+ out4? tab v p pgnd2 tda8594 r s 470 nf r s 470 nf r s 470 nf 5 v
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 40 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier fig 30. beep input circuit (gain = 0 db) to appl y a microprocessor beep signal to all four amplifiers fig 31. complex loads for measuring thd in line driver mode fig 32. circuit for combined mode selection and clip detection functions on pin stb 001aad133 micro- processor tda8594 47 pf 17 acgnd 100 1 f 0.22 f 1.7 k 001aad134 3.9 nf 3.9 nf 180 pf positive output negative output 200 3.9 nf 3.9 nf 180 pf positive output b) a) negative output 47 k 47 k 001aad131 4.7 k 10 k 18 k 8.5 v 5.6 k stb switch 2 tda8594 3.3 v micro- processor
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 41 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 13.1 pcb layout fig 33. pcb layout of test and app lication circuit; copper layer top fig 34. pcb layout of test and applicatio n circuit; copper layer bottom (top view) 001aad162 top 001aad163 bot
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 42 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 14. test information 14.1 quality information this product has been qualified in accordance with the automotive electronics council (aec) standard q100 - failure mechanism based stress test qualification for integrated circuits , and is suitable for use in automotive applications. fig 35. pcb layout of test and ap plication circuit; components top fig 36. pcb layout of test and applicatio n circuit; components bottom (top view) 001aad164 top + + + ++ tda8594/tda8595 sense 2200 f 2.2 f 2.2 f 1 f 10 f philips semiconductors scl gnd + 5v sda 12c supply 470 nf 470 nf ? 4 + ? 3 + out on mute off gnd 12c d1 legacy gnd v p v p 10 k clip 2 de (11) da (01) d8 (00) dz 8.2 v + 1 ? + 2 ? out sgnd in 34 21 mode on diag s. by address select 001aad165 bot tda3664 4 470 nf 470 nf 470 nf 4.7 k 18 k 10 k 10 k 2 k bc859 12 k 51 k 22 k 220 nf 220 nf 250
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 43 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 15. package outline fig 37. package outline sot827-1 (dbs27p) references outline version european projection issue date iec jedec jeita sot827-1 sot827-1_po 13-02-13 13-05-30 unit mm max nom min 19 4.6 4.4 0.5 0.3 29.2 28.8 24.8 24.4 15.9 15.5 3.55 3.25 12 21 8 1.15 0.85 22.9 22.1 2.1 1.8 a dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. dbs27p: plastic dil-bent-sil (special bent) power package; 27 leads (lead length 6.8 mm) sot827-1 a 2 b p 0.60 0.45 cd (1) dd h 0.6 0.25 qvw 0.03 1.8 1.2 xz (1) e (1) ee 1 e 2 4 e h jl 3.40 6.8 l 2 3.9 3.1 l 3 l 4 4 m 0 10 20 mm scale x e 2 e 1 e m b w v l e a a 2 l 3 l 4 l 2 d h e h non-concave view b: mounting base side d b p d z 1 27 j c q
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 44 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier fig 38. package outline sot878-1 (rdbs27p) references outline version european projection issue date iec jedec jeita sot878-1 sot878-1_po 12-12-19 13-02-13 unit mm max nom min 13.5 4.6 4.4 0.5 0.3 29.2 28.8 24.8 24.4 15.9 15.5 12 2 1 8 3.40 2.1 1.8 1.8 1.2 0.6 a dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. rdbs27p: plastic rectangular-dil-bent-sil (reverse bent) power package; 27 leads (row spacing 2.54 mm) sot878-1 a 2 b p 0.60 0.45 cd (1) dd h 0.03 xz (1) e (1) ee 1 e 2 2.54 e h jl 3.55 3.25 l 1 3.75 3.15 3.75 3.15 qv 0.25 w b p d d d h a 2 l c l 1 q z e h e j x e 2 a e 1 e v w view b: mounting base side non-concave b 27 1 0 10 20 mm scale
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 45 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 16. mounting 17. abbreviations dimensions in mm. reflow soldering is the recommended soldering method. dimension ?1? relates to dimension ?e 1 ? in figure 38 ; dimension ?2? relates to dimension ?e 2 ? in figure 38 . fig 39. sot878-1 reflow soldering footprint sot878-1_fr dimensions in mm ? 0.08 m 27 26 1 2 hole diameter min. 0.92 2.54 1 2 table 18. abbreviations acronym description ack acknowledge not bcdmos bipolar cmos/dmos btl bridge tied load cmos complementary metal-oxide semiconductor dmos double-diffused metal-oxide semiconductor dsp digital signal processor emc electromagnetic compatibility esr equivalent series resistance lsb least significant bit msb most significant bit nmos negative-channel metal-oxide semiconductor pmos positive-channel metal-oxide semiconductor pcb printed-circuit board por power-on reset soar safe operating area soi silicon on insulator
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 46 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 18. revision history table 19. revision history document id release date data sheet status change notice supersedes tda8594 v.5 20130611 product data sheet - tda8594_4 modifications: ? the package outline figure 37 has been updated. tda8594 v.4 20130226 product data sheet - tda8594_3 modifications: ? the data sheet template has been updated to the latest version. tda8594 v.3 20130221 product data sheet - tda8594_2 modifications: ? the package outline figures, figure 37 and figure 38, have been updated. tda8594_2 20071211 product data sheet - tda8594_1 modifications: ? the format of this data sheet has been redesi gned to comply with the new identity guidelines of nxp semiconductors. ? legal texts have been adapted to the new company name where appropriate. ? section 2.1 and section 14: added device qualification ?aec-q100 qualification?. ? figure 1 and figure 29: changed internal circuit on pin svr. ? figure 32: value of base-emitter resistor changed to 5.6 k ? . ? table 17, diagnostic: ? symbols and parameters of ?junction temperature? characteristics updated (4 ? ). ? (old) symbol and parameter ?i om = peak current output? changed to ?i th(o)det(load)ac = ac load detection output threshold current?. tda8594_1 (9397 750 15066) 20060302 product data sheet - -
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 47 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier 19. legal information 19.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 19.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 19.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
tda8594 all information provided in this document is subject to legal disclaimers. ? nxp b.v. 2013. all rights reserved. product data sheet rev. 5 ? 11 june 2013 48 of 49 nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 19.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp b.v. 20. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors tda8594 i 2 c-bus controlled 4 ? 50 w power amplifier ? nxp b.v. 2013. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 11 june 2013 document identifier: tda8594 please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 21. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 general . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 i 2 c-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 1 3 quick reference data . . . . . . . . . . . . . . . . . . . . . 2 4 ordering information . . . . . . . . . . . . . . . . . . . . . 2 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 4 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 functional description . . . . . . . . . . . . . . . . . . . 5 7.1 input stage . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 7.2 output stage . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 7.3 distortion (clip) detection . . . . . . . . . . . . . . . . . 6 7.4 output protection and shor t-circuit operation . . 6 7.5 soar protection. . . . . . . . . . . . . . . . . . . . . . . . 6 7.6 speaker protection . . . . . . . . . . . . . . . . . . . . . . 6 7.7 standby and mute operation. . . . . . . . . . . . . . . 7 7.7.1 legacy mode (pin adsel connected to ground) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.7.2 i 2 c-bus mode . . . . . . . . . . . . . . . . . . . . . . . . . . 7 7.8 start-up and shut-down sequence . . . . . . . . . . 7 7.9 power-on reset and supply voltage spikes . . . 11 7.10 engine start and low voltage operation. . . . . . 11 7.11 overvoltage and load dump protection. . . . . . 14 7.12 thermal pre-warning and thermal protection . 14 7.13 diagnostics . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 7.14 offset detection. . . . . . . . . . . . . . . . . . . . . . . . 16 7.15 dc load detection . . . . . . . . . . . . . . . . . . . . . . 16 7.16 ac load detection . . . . . . . . . . . . . . . . . . . . . . 17 7.17 i 2 c-bus diagnostic readout . . . . . . . . . . . . . . . 18 8 i 2 c-bus specification . . . . . . . . . . . . . . . . . . . . 19 8.1 instruction bytes . . . . . . . . . . . . . . . . . . . . . . . 20 8.2 data bytes. . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 9 limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 26 10 thermal characteristics . . . . . . . . . . . . . . . . . 27 11 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 27 12 performance diagrams . . . . . . . . . . . . . . . . . . 32 13 application information. . . . . . . . . . . . . . . . . . 39 13.1 pcb layout . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 14 test information . . . . . . . . . . . . . . . . . . . . . . . . 42 14.1 quality information . . . . . . . . . . . . . . . . . . . . . 42 15 package outline . . . . . . . . . . . . . . . . . . . . . . . . 43 16 mounting. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 17 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 45 18 revision history . . . . . . . . . . . . . . . . . . . . . . . 46 19 legal information . . . . . . . . . . . . . . . . . . . . . . 47 19.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 47 19.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 19.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 47 19.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 48 20 contact information . . . . . . . . . . . . . . . . . . . . 48 21 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49

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